Lee Duna@lemmy.nz to Technology@lemmy.worldEnglish · edit-21 year ago1-bit CPU for ‘super low-performance computer’ launched – sells out promptlywww.tomshardware.comexternal-linkmessage-square52fedilinkarrow-up1339arrow-down16file-textcross-posted to: [email protected]
arrow-up1333arrow-down1external-link1-bit CPU for ‘super low-performance computer’ launched – sells out promptlywww.tomshardware.comLee Duna@lemmy.nz to Technology@lemmy.worldEnglish · edit-21 year agomessage-square52fedilinkfile-textcross-posted to: [email protected]
minus-squareMunicipal0379@lemmy.worldlinkfedilinkEnglisharrow-up18·1 year agoOkay, but will it run doom??
minus-squareIHeartBadCode@kbin.sociallinkfedilinkarrow-up10·1 year agoIDK about Doom but someone is likely already working on a VLC port for it.
minus-squarelinearchaos@lemmy.worldlinkfedilinkEnglisharrow-up8·1 year agoUnfortunately it’s about 15 bits short.
minus-squaremidori@lemmy.worldlinkfedilinkEnglisharrow-up19·1 year agoImagine having to build a hardware cluster just to run Doom. I hope somebody reads this and does it lmao
minus-squarelinearchaos@lemmy.worldlinkfedilinkEnglisharrow-up8·1 year agoSomebody wrote an FPGA that plays level 1. No processor, just a great big mess of programmed wires.
minus-squarelinearchaos@lemmy.worldlinkfedilinkEnglisharrow-up1·1 year agoI mean if the FPGA is done an asic would be doable, but someone would need to REALLY want to do it.
minus-squareJohnnyCanuck@lemmy.calinkfedilinkEnglisharrow-up7·1 year agoThey mention in the article that it won’t :(
minus-squarejmd_akbarlinkfedilinkEnglisharrow-up2·edit-21 year agoI’m not mad… I’m just disappointed…
Okay, but will it run doom??
IDK about Doom but someone is likely already working on a VLC port for it.
Unfortunately it’s about 15 bits short.
So buy more!
Imagine having to build a hardware cluster just to run Doom.
I hope somebody reads this and does it lmao
Somebody wrote an FPGA that plays level 1. No processor, just a great big mess of programmed wires.
Now make it in hardware (asic)
I mean if the FPGA is done an asic would be doable, but someone would need to REALLY want to do it.
They mention in the article that it won’t :(
I’m not mad… I’m just disappointed…
You just wait!