That’s not really how it works actually. You got sort of the idea that ARM is a Reduced Instruction Set Computer (RISC) architecture but the reduction here refers more to the variety of instructions rather than amount of instructions. In fact ARM typically requires more instructions since there’s less varieity.
But that really doesn’t mean much in modern processor architectures since all modern processors decode assembly instructions into micro operations internally and execute them. Each instruction and their corresponding micro operations may have a different number of cpu cycles to execute so it’s not something that’s so easily calculatable.
The age of RISC vs CISC (x86, etc) debates has largely ended because of how modern CPUs work. The difference between instruction sets mostly just come down to the language that compilers translate to.
The number of Assembly instructions needed to do similar things tends to be less on ARM, from my limited understanding. That leads to efficiencies.
That’s not really how it works actually. You got sort of the idea that ARM is a Reduced Instruction Set Computer (RISC) architecture but the reduction here refers more to the variety of instructions rather than amount of instructions. In fact ARM typically requires more instructions since there’s less varieity.
But that really doesn’t mean much in modern processor architectures since all modern processors decode assembly instructions into micro operations internally and execute them. Each instruction and their corresponding micro operations may have a different number of cpu cycles to execute so it’s not something that’s so easily calculatable.
The age of RISC vs CISC (x86, etc) debates has largely ended because of how modern CPUs work. The difference between instruction sets mostly just come down to the language that compilers translate to.