Just a reminder the RISC-V architecture is not open source as many think it is only the instruction set is open source. We remain far from a truly open/libre hardware for now
Sorry, but that is completely wrong. RISC-V is an ISA, nothing less, nothing more, and it is completely, 100% open-source. The licensing of the hardware implementations is a different matter, but that’s outside of the scope of RISC-V. As I said, it is just an ISA.
Just a reminder the RISC-V architecture is not open source as many think it is only the instruction set is open source. We remain far from a truly open/libre hardware for now
Sorry, but that is completely wrong. RISC-V is an ISA, nothing less, nothing more, and it is completely, 100% open-source. The licensing of the hardware implementations is a different matter, but that’s outside of the scope of RISC-V. As I said, it is just an ISA.
There’s plenty of designs out there that you can load onto an FPGA or, funds permitting, send off to a fab to burn into silicon.