I assume it’d be used for high quality time synchronisation, when you’re running your own time servers.
So you’ve got a system synced to a GPS unit, and sends it’s time to other devices on the LAN via PTP. This would help the system account for latency between the CPU and NIC, I assume.
There’s a talk here: https://www.youtube.com/watch?v=jMUMRNRkcMg but I’m not much clearer after scrubbing through some of the slides. It sounds like all GPIO pins on recent Intel chips support this Timed I/O functionality. I don’t know if they could measure the timing of transactions to a NIC - I would think this is only for specialist hardware or testing. They mention using a logic analyser to compare the clocks of two systems after synchronisation.
I assume it’d be used for high quality time synchronisation, when you’re running your own time servers.
So you’ve got a system synced to a GPS unit, and sends it’s time to other devices on the LAN via PTP. This would help the system account for latency between the CPU and NIC, I assume.
There’s a talk here: https://www.youtube.com/watch?v=jMUMRNRkcMg but I’m not much clearer after scrubbing through some of the slides. It sounds like all GPIO pins on recent Intel chips support this Timed I/O functionality. I don’t know if they could measure the timing of transactions to a NIC - I would think this is only for specialist hardware or testing. They mention using a logic analyser to compare the clocks of two systems after synchronisation.
Yeah that makes sense.